PDP-11/20 class machines don't support XOR. To simulate one...

// r1: r0 XOR r1
// r2: tmp
mov r0, r2
bic r1, r0
bic r2, r1
bis r0, r1

It's just the standard textbook formula: (NOT a) AND b) OR (a AND (NOT b). It's usually inefficient, better alternatives exist. But on the PDP-11, due the "BIC" instruction, I strongly suspect the textbook formula is optimal.

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@niconiconi And stuff like this is why CISC was created. The pendulum sure does swing.

@gudenau No, this is not. There are many good examples on RISC vs CISC, but this is not one of them. The reason of not supporting XOR was solely to reduce the cost of the low-end machines. Before VLSI, every instruction takes real dollars to implement. it's not the result of its architectural design. PDP-11 itself is the quintessential example of a CISC architecture. If you want XOR, you can just pay more and buy an Extended Instruction Set option, which is a module that plugs into the CPU. You can also buy a better model (PDP-11/40 +), which comes with native XOR support.

@niconiconi I swear CISC was made mostly to reduce ASM program size and complexity.

Eh, didn't live it so it's easy to be wrong.

@gudenau RISC is not just the number of instructions but also the load/store architecture. One thing that clearly defines the PDP-11 as a CISC machine is that almost ALL of its instructions can manipulate data in memory. For example, memcpy()

while (count--)
*dst++ = *src++;

In PDP-11 assembly, it's just

mov (r1)+, (r2)+
sob r0, copy

You can't get more CISC than that.

@niconiconi That's kinda crazy. I know there is an instruction in AMD64 that does basically that so it's similar, but I don't think you can increment a register like that. Might be an interesting thing to throw in an architecture if you have a couple of bits to spare.

@izaya @gudenau I'd say

mov (r1)+, (r2)+

shows the PDP-11 is CISC, but

mov -(pc), -(pc)

shows the PDP-11 is fully orthogonal. The program counter on the PDP-11 works just like a normal register for almost all instructions. This program takes the current address executed by the CPU and copy its content (e.g. the instruction itself) to the previous address, and decrement PC to that address - it's a self-replicating virus that fills the entire memory.

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